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EL4102C - Preliminary
EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
Features
* * * * * * 4:1 multiplexer with monitor out 18dB variable gain amplifier DC-restore amplifier Digital control serial interface 5V operation 500MHz bandwidth
General Description
The EL4102C VFE (Video Front End) is designed to perform all of the input processing functions in an analog video system as well as provide analog input processing for digital video systems. The EL4102C VFE contains a 4:1 MUX input, a DC-restore amplifier and a variable gain amplifier. The MUX input can be used to select which input to use. In a digital system, the DC-restore and variable gain amplifiers allow the input signal to be positioned and scaled to give optimum A-to-D conversions results. In an analog system these perform the brightness and contrast operations. A buffered output of the MUX selection is also available for use as a monitor output. With a 500MHz bandwidth and only 50mA supply current, the EL4102C is ideal for use in portable and fixed projectors, as well as HDTV, DTV and other high performance video applications. A 3-wire digital interface enables full control of the input selection, as well as 0 to -18dB of gain and blanking operations. The EL4102C is available in the QSOP24 package and is specified for operation over the -40C to +85C temperature range.
Outline # MDP0040
Applications
* * * * * * HDTV/DTV Analog Inputs Video Projectors Computer Monitors Set Top Boxes Security Video Broadcast Video Equipment
Ordering Information
Part No. EL4102CU Package 24-Pin QSOP Tape & Reel
Connection Diagram
SAMPLE PULSE 1 HOLD 2 GNDL2 VI/P0 3 IN0 +5V VI/P1 5 IN1 0V VI/P2 7 IN2 -5V VI/P3 9 IN3 10 ENB ENB SDI SCLK 11 SDI 12 SCLK MFDBK 16 GNDL 15 PDWN 14 SDO 13 PDWN DATAOUT 8 VSVS- 18 MOUT 17 RGM -5V RFM Monitor Out RL=150 6 GNDI VOUT 20 VS2+ 19 +5V Video Out RL=150 4 VS1+ DCFDBK 22 RGV VFDBK 21 RFV CAP 24 DCREF 23 DCV CH 0.33nF
August 30, 2001
Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a "controlled document". Current revisions, if any, to these specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation.
(c) 2001 Elantec Semiconductor, Inc.
EL4102C - Preliminary
EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
Absolute Maximum Ratings (T
A
= 25C)
Values beyond absolute maximum ratings can cause the device to be prematurely damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. 11V Supply Voltage (VS+ to VS-) Input Voltage VS- - 0.3V, VS+ +0.3V
Storage Temperature Range Ambient operating Temperature Operating Junction Temperature Power Dissipation
-65C to +150C -40C to +85C 125C See Curves
Important Note: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA.
Electrical Characteristics
VS1+ = VS2+ = 5V, VS1- = VS2- = -5V, RFV = RFG = 750, RGV = RGM = O.C., AV = 1, RLV = RLM = 150, CLV = CLM = 3p, CH = 0.33n, GAIN = 1. Parameter Supply IS1+ IS IS2+ IS1S+ ISSIS2S+ VS1+, VS2+ VS Input Ib Ibo VIH VIL VIP VIN IIDL IIDH IIL IIH tsh tsu th fclk tsue the tpd Output VOSM VOS TCVOS VO + VO VSDO high VSDO low Output Offset Voltage - Monitor DC-restore Offset Voltage Output Offset Voltage Drift - Video Output Voltage Swing, Pos. Output Voltage Swing, Neg. Serial Data Output High Serial Data Output Low VIN = 0V auto-zero on, DCREF = 0 auto-zero on Attenuator = 0dB, Monitor & Video Outputs Attenuator = 0dB, Monitor & Video Outputs IL = +1mA IL = -1mA 3.44 -400 -5 30 15 3.5 -3.5 4.7 0.25 -3.43 420 5 mV mV V/C V V V V Input Bias Current Input Bias Current Drift with Temp. Input High Voltage Input Low Voltage Input Voltage Swing, Pos. Input Voltage Swing, Neg. Low Input Current for SCLK and ENB High Input Current for SCLK and ENB Low Input Current for SDI, PDWN, HOLD High Input Current for SDI, PDWN, HOLD Sample and Hold Delay Time Data Set Up Time Data Hold Time Serial Clock Rate Enable Set Up Time Enable Hold Time Clock to Data Output Delay CL = 10pF TBD TBD TBD TBD TBD Saturated Input, Att. code = 01010 Saturated Input, Att. code = 01010 VIN = 0V VIN =5V VIN = 0V VIN =5V 50 0 15 0 3.35 3.5 -3.5 85 0.1 48 0.1 15 10 10 TBD 10 10 21 TBD TBD 5 -3.39 150 10 75 10 VIN = 0V VIN = 0V 2 0.8 -22.4 -2.2 TBD 6.1 A nA/C V V V V A A A A ns ns ns MHz ns ns ns Positive Supply Current 1 Negative Supply Current Positive Supply Current 2 Positive Supply Current 1 in Standby Negative Supply Current in Standby Positive Supply Current 2 in Standby Positive Supply Voltage Negative Supply Voltage VIN = 0, IL = 0 VIN = 0, IL = 0 Standby Standby Standby 14 3.8 0.57 -10 4.5 -4.5 35 45 15 5 1 5.0 -5.0 20 7.3 1.3 10 5.5 -5.5 mA mA mA mA mA A V V Description Conditions Min Typ Max Unit
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EL4102C - Preliminary
EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
Electrical Characteristics
VS1+ = VS2+ = 5V, VS1- = VS2- = -5V, RFV = RFG = 750, RGV = RGM = O.C., AV = 1, RLV = RLM = 150, CLV = CLM = 3p, CH = 0.33n, GAIN = 1. Parameter ISC SR SRM OS OSM ts tsm VREF tsd VOHS VOSB ICCL IDC BW BWM 0.1BW 0.1BWM Vp Vpm dP dG dPM dPG en enm AC Performance Slew Rate - Video Out (20%-80%) Slew Rate - Monitor Out (20%-80%) Output Overshoot, Video Output Overshoot, Monitor Settling Time to 1%, Video Settling Time to 1%, Monitor DC-restore Reference Voltage Range DC-restore - Settling Time to 1% DC-restore - Video Output Hold Step DC-restore - Offset vs. Black Level DC-restore - Charge Current Limit, ICAP DC-restore - Droop Current, ICAP 3dB Bandwidth, Video Out 3dB Bandwidth, Monitor Out 0.1dB Flat Bandwidth, Video Out 0.1dB Flat Bandwidth, Monitor Out Peaking, Video Peaking, Monitor Diff. Phase @3.58MHz, Video Diff. Gain @3.58MHz, Video Diff. Phase @3.58MHz, Monitor Diff. Gain @3.58MHz, Monitor Noise Voltage at Input for VOUT Noise Voltage at Input for MOUT Crosstalk [1] @10MHz Crosstalk [1] @100MHz Attenuator Range Attenuator Step Size Relative Attenuation Error 31 Steps Between any 2 levels 3 channel hostile 3 channel hostile 0 Attenuator = 00000 VIN = -2V to +2V Sample Mode On S - H Transition Sample Mode On Sample Mode On Hold Mode On Attenuator = 00000 -30 -1 -2 VOUT = 4VP-P VOUT = 4VP-P VOUT = 1VP-P VOUT = 1VP-P Hold Mode 1000 1250 2100 2100 TBD TBD TBD TBD 1.2 -1.1 -0.6 260 TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD -45 -20 18.2 0.58 0.2 30 1 2 4500 3900 V/S V/S % % ns ns V S mV mV/V A nA MHz MHz MHz MHz dB dB % % nV/Hz nV/Hz dB dB dB dB dB Description Output Short Circuit Current Conditions RL = 10, Source or Sink Min 65 Typ 100 Max Unit mA
1. Total unwanted output normalized by wanted (or expected) output; add -10dB to get channel-to-channel isolation
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EL4102C - Preliminary
EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
Serial Programming Truth Table
Inputs (X = Don't Care) Standby MSB B7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 B6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X X X X X 1 B5 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 X X X X X 1 Attenuation B4 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 X X X X X 1 B3 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X X X X X 1 B2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X X X X X 1 Input Selection LSB B1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 1 1 0 0 X 1 B0 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 1 0 1 0 X 1 0dB = 1.000 -0.6dB = 0.94 -1.2dB = 0.88 -1.7dB = 0.82 -2.3dB = 0.77 -2.9dB = 0.7 -3.5dB = 0.67 -4.1dB = 0.63 -4.6dB = 0.59 -5.2dB = 0.55 -5.8dB = 0.51 -6.4B = 0.48 -7.0dB = 0.45 -7.5dB = 0.42 -8.1dB = 0.39 -8.7dB = 0.37 -9.3dB = 0.34 -9.9dB = 0.32 -10.5dB = 0.30 -11.0dB = 0.28 -11.6dB = 0.26 -12.2dB = 0.25 -12.8dB = 0.23 -13.4dB = 0.22 -13.9dB = 0.20 -14.5dB = 0.19 -15.1dB = 0.18 -15.7dB = 0.17 -15.3dB = 0.15 -16.8dB = 0.14 -17.4dB = 0.13 -18.0dB = 0.12 IN3 Selected IN2 Selected IN1 Selected IN0 Selected Standby Mode - Powered Down Wake-up Condition (-18.0dB, IN3, Powered Down) Attenuation
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EL4102C - Preliminary
EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
Control Bits Logic Table
Bit B7 B6 B5 B4 B3 B2 B1 B0 Standby - Power Down Gain Bit 4 Gain Bit 3 Gain Bit 2 Gain Bit 1 Gain Bit 0 Input Select Bit 1 Input Select Bit 0 Function
Serial Timing Diagram
ENB
tHE
tSE
T
tr
tf
tHE
tSE
SCLK tSD tHD tw
SDI
B7 MSB
B6 Load MSB first, LSB last
B5
B4-B2
B1
B0 t LSB
Serial Timing Parameters
Parameter T tr/tf tHE tSE tHD tSD tw Example 100 ns 0.05 x T 40ns 40ns 40ns 40ns 0.50 x T Clock Period Clock Rise/Fall Time ENB Hold Time ENB Setup Time Data Hold Time Data Setup Time Clock Pulse Width Description
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EL4102C - Preliminary
EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
Pin Descriptions
Pin Number 1 2 3 4 5 6 7 8 0 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pin Name HOLD GNDL2 IN0 VS1+ IN1 GNDI IN2 VS IN3 ENB SDI SCLK SDO PDWN GNDL MFDBK MOUT VS VS2+ VOUT VFDBK DCFDBK DCREF CAP Pin Type Logic Input Logic Ground High Frequency Signal Power High Frequency Signal Analog Signal High Frequency Signal Power High Frequency Signal Logic Input Logic Input Logic Input Logic Output Logic Input Logic Ground High Frequency Signal High Frequency Signal Power Power High Frequency Signal High Frequency Signal Analog Signal Analog Signal Analog Signal Hold pulse for DC-restore function Logic ground for "hold" buffer Video input #0 Positive power pin for quiet supply currents Video input #1 Intermediate reference for attenuation function Video input #2 Negative power pin Video input #3 Enable (negative true) input for loading serial data stream Serial input data stream Serial data stream clock Serial output data stream for connection to cascaded chip Power down input to put chip in low current standby mode Logic ground for logic buffers Monitor amplifier feedback Monitor amplifier output Negative power pin Positive power pin for heavy, pulsatile supply currents Video amplifier output Video amplifier feedback Input to sample circuit Reference DC voltage representing black level Sample storage capacitor for DC-restore circuit Pin Description
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EL4102C - Preliminary
EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
Block Diagram (Gain of 1)
VS+
MFDBK + MOUT
750
Input Video
IN0
X Input Video IN1
+ -
VOUT 750 VFDBK
Input Video
IN2
+ -
DCFDBK DCREF
Input Video
IN3
HOLD
ENB SDI SCLK GNDL GNDI GNDL2 VSPDWN
CAP CH SD0
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EL4102C - Preliminary
EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
Applications Information
Using the Serial Data Output Connection for a Multi-chip Design
In a system design that uses three chips, (i.e. RGB, YUV, YPrPb systems) the control signal may be "daisy chained" through the three chips. This gives an advantage in that the control will be updated simultaneously on the three channels. The serial data out (SDO) of chip one is connected to the serial data in (SDI) of chip two, similarly, chip two SDO is connected to SDI on chip three. The clock (SCLK) and enable (/ENB) signals are connected in parallel to all three chips. See figure yy for suggested interconnect of the control signals.
Figure xx shows the control signal waveforms when using this configuration. Note, that the last data bit clocked into the three chips occurs on the last positive clock edge that is within the enabled period. This will be D0 in the first chip, D8 and D16 on the second two chips. The rising edge of /ENB will then simultaneously
transfer the data internally to the chip. Typically the data for each chip is held as an image in the micro-controller system; the load operation would prepare the update information as a 24-bit word ready for shifting into the three chips.
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EL4102C - Preliminary
EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
General Disclaimer
Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement.
WARNING - Life Support Policy
Elantec, Inc. products are not authorized for and should not be used within Life Support Systems without the specific written consent of Elantec, Inc. Life Support systems are equipment intended to support or sustain life and whose failure to perform when properly used in accordance with instructions provided can be reasonably expected to result in significant personal injury or death. Users contemplating application of Elantec, Inc. Products in Life Support Systems are requested to contact Elantec, Inc. factory headquarters to establish suitable terms & conditions for these applications. Elantec, Inc.'s warranty is limited to replacement of defective components and does not cover injury to persons or property or other consequential damages.
August 30, 2001
Elantec Semiconductor, Inc.
675 Trade Zone Blvd. Milpitas, CA 95035 Telephone: (408) 945-1323 (888) ELANTEC Fax: (408) 945-9305 European Office: 44-118-977-6020 Japan Technical Center: 81-45-682-5820
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Printed in U.S.A.

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